Low-power, high-speed sram design: A review


Tan, Soon-Hwei and Loh, Poh-Yee and Mohd-Shahiman, Sulaiman and Yusoff, Zubaida (2007) Low-power, high-speed sram design: A review. INFORMACIJE MIDEM-JOURNAL OF MICROELECTRONICS ELECTRONIC COMPONENTS AND MATERIALS, 37 (1). pp. 5-11.

Full text not available from this repository.


This article describes the challenges in the design of low-power SRAM and difficulties in designing a high-speed static RAM, Following an overview of general issues, approaches/techniques in achieving low-power SRAM, as well as techniques to increase SRAM operating frequency are described. Following the overview of each approach, the challenges and trade-offs are outlined.

Item Type: Article
Subjects: T Technology > T Technology (General)
Q Science > QA Mathematics > QA71-90 Instruments and machines > QA75.5-76.95 Electronic computers. Computer science
Divisions: Faculty of Engineering and Technology (FET)
Depositing User: Ms Suzilawati Abu Samah
Date Deposited: 18 Oct 2011 07:01
Last Modified: 18 Oct 2011 07:01
URII: http://shdl.mmu.edu.my/id/eprint/3106


Downloads per month over past year

View ItemEdit (login required)