Citation
Ong, Poay Yin (2003) Finite Impulse Response Filter Design Using VHDL. Masters thesis, Multimedia University. Full text not available from this repository.
Official URL: http://myto.perpun.net.my/metoalogin/logina.php
Abstract
The report discusses the innovative approach of designing a Finite Impulse Response filter, using IEEE floating point arithmetic. A design is writen in VHDL code.
| Item Type: | Thesis (Masters) |
|---|---|
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics |
| Divisions: | Faculty of Engineering (FOE) |
| Depositing User: | Ms Rosnani Abd Wahab |
| Date Deposited: | 14 Jul 2010 02:30 |
| Last Modified: | 14 Jul 2010 02:30 |
| URII: | http://shdl.mmu.edu.my/id/eprint/963 |
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