Effect of Heating Profile of Printed Circuit Boards using Shadow Moiré and Simulations

Citation

Onn, Sim Jui and Tan, Khai Shiang and Tou, Teck Yong and Yap, Seong Shan and Lau, Chun Sean and Chin, Yoong Tatt (2019) Effect of Heating Profile of Printed Circuit Boards using Shadow Moiré and Simulations. In: 14th Asia Pacific Physics Conference (APPC 2019), 17-22 Nov. 2019, Borneo Convention Centre Kuching (BCCK), Kuching, Malaysia.

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Abstract

Printed circuit board (PCB) owns the most significant development in circuit packaging. It provides electrical connectivity for various electronic components, fixed in position surface-mounted by soldering. During high temperature reflow soldering process, there is a possibility of having mismatch of coefficients of thermal expansion (CTE) where PCB materials experience expansion in different dimensions. CTE mismatch leads to deformation of the board and package side. Solder balls experience cyclical stress from the warp, causing cracks in solders hence disjoint. In this study, the thermal induced warpage in multi-layer SSD PCB arrays are measured using Shadow Moiré method. During experiment, bottom part of the board may experience more heating than the top part of the board, which results in temperature difference between the top and bottom sides of PCB, ΔT. ΔT was controlled in Shadow Moiré by changing the heating powers (30%, 80%, and 100%) and by using different heating profiles. Finite element analysis (FEA) are carried out to determine the warpage of the PCB arrays. Simulation results are compared to the Shadow Moiré measurements

Item Type: Conference or Workshop Item (Paper)
Uncontrolled Keywords: Printed circuit board
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
Divisions: Faculty of Engineering (FOE)
Depositing User: Ms Rosnani Abd Wahab
Date Deposited: 14 Oct 2021 07:46
Last Modified: 14 Oct 2021 07:46
URII: http://shdl.mmu.edu.my/id/eprint/9551

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