A Low Power High Precision Trim-Less Envelope Detector for Fail-Safe Circuit in LVDS Receiver

Citation

Lee, Seng Siong and Lee, Lini and Kung, Fabian Wai Lee and Saad, Ahmed and Ramiah, Harikrishnan and Tan, Gim Heng (2020) A Low Power High Precision Trim-Less Envelope Detector for Fail-Safe Circuit in LVDS Receiver. IEEE Transactions on Circuits and Systems--II: Express Briefs, 67 (10). pp. 1770-1774. ISSN 1549-7747, 1558-3791

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Abstract

This brief presents a trim-less precision envelope detector for fail-safe circuit in LVDS receiver. A preamp is proposed using gm-constant biasing concept to produce an accurate gain of 9.78 dB across PVT covering the full range of the LVDS input common-mode voltage. The preamp produces a fixed output common-mode voltage of 200 mV across supply voltage variation which reduces its complexity by alleviating the need of a trimming circuit. A unique reference voltage generation of the envelope detector based on level shifted output common-mode voltage accurately compares the output common-mode and negative peak voltages to set the detection threshold. An LVDS receiver adopting the proposed envelope detector was fabricated on a standard 0.13-μm CMOS. With a supply voltage of 3.3 V, the envelope detector achieves a voltage trimming precision of 20 mV while only consuming 162 μW of power.

Item Type: Article
Uncontrolled Keywords: Envelop detector, preamp, peak detector, low-voltage differential signaling~(LVDS), Detectors
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
Divisions: Faculty of Engineering (FOE)
Depositing User: Ms Rosnani Abd Wahab
Date Deposited: 20 Aug 2021 08:11
Last Modified: 20 Aug 2021 08:11
URII: http://shdl.mmu.edu.my/id/eprint/8812

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