Citation

Ponnian, Jebashini and C, Senthilpari and Ramadass, Uma and Ooi, Chee Pun (2021) A New Systematic GDI Circuit Synthesis Using MUX Based Decomposition Algorithm and Binary Decision Diagram for Low Power ASIC Circuit Design. Microelectronics Journal, 108. p. 104963. ISSN 0026-2692

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Abstract

The advances in the new process technology characteristically come with a multitude of new design variables andhence a new set of challenges for the designers to understand the impact of circuit design. During the last decade,widespread deliberations have been specified to the usage of Gate Diffusion Input (GDI) networks in the design ofdigital core systems; however the logic design has been constructed using transistor-level. Till now there is nospecific approach is available for synthesizing GDI circuit that incorporated the impact of signal arrangement andcircuit technology. Creation of standard cell library for GDI technique becomes an utmost imperative. In thisresearch work, a regimented synthesis algorithm have been proposed to minimize power and augment perfor-mance of the digital circuits through two approaches MUX based decomposition algorithm and Binary DecisionDiagram (BDD). The primitive nodes are implemented by GDI logic and CMOS logic for level restoration circuit.This research work is targeted to design sub-micron GDI library which is suitable for the 180 nm and 90 nm 6-metal layer CMOS n-well process which is offered by MOSIS. The principal focus is to engender a comprehensivelibrary including the core number of essential primitive cells, depicting the detailed layout and transistor-levelschematic views of every cell in 180nm and 90 nm process, in order to use them as a completely synthesizablelibrary. The signal connectivity models for GDI are presented using MUX and BDD approach. The synthesis ofISCAS Combinational bench mark circuit in CMOS, PTL and GDI technique is also examined in this work alongwith buffer inclusion procedure for GDI technique

Item Type:	Article
Uncontrolled Keywords:	Binary Decision Diagram; Gate Diffusion Technique; Synthesizable Library; Directed Acyclic Graph
Subjects:	T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK9001-9401 Nuclear engineering. Atomic power
Divisions:	Faculty of Engineering (FOE)
Depositing User:	Ms Rosnani Abd Wahab
Date Deposited:	04 Oct 2021 03:22
Last Modified:	04 Oct 2021 03:22
URII:	http://shdl.mmu.edu.my/id/eprint/8462

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