Citation

Lim, Soon Chieh (2005) An Architecture and Logic Design of a Discrete Wavelet Transform Processor. Masters thesis, Multimedia University.

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Abstract

Since the advent of wavelets in the 1980s, wavelet analysis has been applied to many different applications, such as video and image compression, digital communications, biomedical signal processing, medical imaging, matrix computation, digital signal processing, and video-conferencing. In this thesis, we propose a dedicated VLSI architecture for implementing the discrete wavelet transform (DWT). In this architecture, a wavelet processor based on a generic reduced-instruction-set-computing (RISC) architecture is designed and optimised for the DWT.

Item Type:	Thesis (Masters)
Subjects:	Q Science > QA Mathematics > QA299.6-433 Analysis
Divisions:	Faculty of Engineering (FOE)
Depositing User:	Users 6 not found.
Date Deposited:	16 Dec 2009 08:27
Last Modified:	17 Feb 2010 08:30
URII:	http://shdl.mmu.edu.my/id/eprint/143

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