Design And Implementation of High Efficient And Low Power Advanced CMOS RF Multistage Power Amplifier For 5G Wireless Communication

Citation

Sridhar, Nagisetty and Chinnaiyan, Senthilpari and Wong, Hin Yong (2022) Design And Implementation of High Efficient And Low Power Advanced CMOS RF Multistage Power Amplifier For 5G Wireless Communication. In: Postgraduate Colloquium December 2022, 1-15 December 2022, Multimedia University, Malaysia. (Unpublished)

[img] Text
nagisetty-foe.pdf - Submitted Version
Restricted to Repository staff only

Download (585kB)

Abstract

In this research work, the design of a high-efficient and low-power multistage PA that complies with the standards of upcoming 5G wireless networks utilized for AMI applications in Smartgrid is presented. The proposed PA is designed to operate at a center frequency of 3.5GHz with a class-J power stage fed by a class-AB driver stage to achieve desired power gain with proper matching network designs. The simulations of proposed PA were performed using ADS EDA tool. The simulation results reveals that the proposed PA delivers an output power of 41dBm with approximately 21 dB power gain over 400MHz bandwidth (BW) along with 54% Drain efficiency and 53% power added efficiency by supplying the PA with 28V to deliver into 50Ω load.

Item Type: Conference or Workshop Item (Poster)
Uncontrolled Keywords: 5G wireless networks
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK5101-6720 Telecommunication. Including telegraphy, telephone, radio, radar, television
Divisions: Faculty of Engineering (FOE)
Depositing User: Ms Rosnani Abd Wahab
Date Deposited: 28 Dec 2022 01:20
Last Modified: 28 Dec 2022 01:20
URII: http://shdl.mmu.edu.my/id/eprint/11018

Downloads

Downloads per month over past year

View ItemEdit (login required)