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Singh, Ajay Kumar and Saadatzi, Mohammadsadegh and Venkata Seshaiah, Chinthakunta (2016) Design of Peripheral Circuits for the Implementation of Memory Array Using Data-Aware (DA) SRAM Cell in 65 nm CMOS Technology for Low Power Consumption. Journal of Low Power Electronics, 12 (1). pp. 9-20. ISSN 1546-1998

Saadatzi, Mohammadsadegh (2015) Design of Power Efficient 32-kilobit Memory Compiler for Variability Tolerance. Masters thesis, Multimedia University.