VHDL Modelling of Low-CostMemory Fault Detection Tester

Citation

Quek, Wei Chun and Pang, Wai Leong and Chan, Kah Yoong and Lee, It Ee and Chung, Gwo Chin (2020) VHDL Modelling of Low-CostMemory Fault Detection Tester. Journal of Engineering Technology and Applied Physics, 2 (2). pp. 17-23. ISSN 26828383

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Abstract

Memory modules are widely used in varies kind of electronics system design. The capacity of the memory modules has increased rapidly since the past few years in order to satisfy the high demand from the end-users. The memory modules’ manufacturers demand more units of automatic test equipment (ATE)to increase the production rate. However, the existing ATE used in the industry to carry out the memory testing is too costly(at least a million dollars per ATE tester). The low-cost memory testers are urgently needed to increase the production rate of the memory module. This has inspired us to design a low-cost memory tester. A low-cost memory fault detection tester with all the major fault detection algorithms that used in industry is modelled using Very High Speed Integrated Circuit Hardware Description Language (VHDL) in this paper to support the need of the low-cost ATE memory tester. The fault detection algorithms modelled are MATS+ (Modified Algorithm Test Sequence), MATS++, March C, March C-, March X, March Y, zero-one and checkerboard scan tests. PERL program isused to analyse the simulation results and a log file will be generated at the end of the memory test. Extensive simulation and experimental test results show that the memory tester modelled covers all the memory test algorithms used in the industry. The low-cost memory fault detection tester designed provides the 100% fault detection coverage for all memory defects.

Item Type: Article
Uncontrolled Keywords: VHDL, Memory tester, March test
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics > TK7885-7895 Computer engineering. Computer hardware > TK7895.M4 Memory systems
Divisions: Faculty of Engineering (FOE)
Depositing User: Mr. MUHAMMAD AZRUL MOSRI
Date Deposited: 18 Jul 2024 02:20
Last Modified: 18 Jul 2024 02:20
URII: http://shdl.mmu.edu.my/id/eprint/12654

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