Items where Subject is "TK7885-7895 Computer engineering. Computer hardware"

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Number of items at this level: 17.


Ba Wazir, Abdulaziz Saleh and Abdul Karim, Hezerul and Lye Abdullah, Mohd Haris and AlDahoul, Nouar and Ahmad Fauzi, Mohammad Faizal and See, John Su Yang and Naim, Ahmad Syazwan and Mansor, Sarina (2021) Design and implementation of fast spoken foul language recognition with different end-to-end deep neural network architectures. Sensors, 21 (3) (710). pp. 1-17. ISSN 1424-8220

James, Praveen Edward and Kit, Mun Hou and Vaithilingam, Chockalingam Aravind and Tan, Alan Wee Chiat (2020) Recurrent neural network-based speech recognition using MATLAB. International Journal of Intelligent Enterprise, 7 (1,2,3). pp. 56-66. ISSN 1745-3232

Kho, Daniel C. K. and Ismail, Wida and Ahmad, Rafidah and Abd Manaf, Asrulnizam (2019) Parallel-Pipelined-Memory-Based Blowfish Design with Reduced FPGA Utilization for Secure ZigBee Real-Time Transmission. Wireless Personal Communications, 104 (1). pp. 471-489. ISSN 1572-834X

Lee, Yung Chong and Chan, Yee Kit and Koo, Voon Chet (2021) Design and Implementation of FPGA-Based FFT Co-Processor Using Verilog Hardware Description Language. Progress In Electromagnetics Research B, 92. pp. 47-70. ISSN 1937-6472

Rahman, Saimunur and See, John Su Yang and Ho, Chiung Ching (2017) Exploiting textures for better action recognition in low-quality videos. EURASIP Journal on Image and Video Processing, 2017 (1). ISSN 1687-5281

Senthilpari, Chinnaiyan and Pandiyan, S. K. and Nirmalraj, T. (2018) Low Power and Improved Speed 1T DRAM Using Dynamic Logic. Journal of Engineering Science and Technology., 13 (6). pp. 1636-1650. ISSN 1823-4690

Shivakumar, Vishnupriya and Senthilpari, Chinnaiyan and Yusoff, Zubaida (2021) A Low-Power and Area-Efficient Design of a Weighted Pseudorandom Test-Pattern Generator for a Test-Per-Scan Built-in Self-Test Architecture. IEEE Access, 9. pp. 29366-29379. ISSN 2169-3536

Tan, Kim Geok and Hossain, Ferdous and Abd. Aziz, Azlan and Hindia, Mhd Nour and Abdul Rahman, Tharek and Dimyati, Kaharudin (2018) Indoor Millimeter-Wave Propagation Prediction by Measurement and Ray Tracing Simulation at 38 GHz. Symmetry, 10 (10). ISSN 2073-8994

Wan Idris, Wan Mohd Rizhan and Mohamed Eshaq, Ahmad Rafi and Bidin, Azman and Jamal, Azrul Amri (2019) Developing new robust motion templates of martial art techniques using R-GDL approach: a case study of SSCM. International Journal of Arts and Technology, 11 (1). pp. 36-79. ISSN 1754-8853, 1754-8861

Book Section

Chua, Ming Yam and Sri Sumantyo, J. T. and Ji, Y. Q. (2019) An 8-Channels FPGA-Based Reconfigurable Chirp Generator for Multi-Band Full Polarimetric Airborne/Spaceborne CP-SAR. In: 2018 Progress in Electromagnetics Research Symposium (PIERS-Toyama). IEEE, pp. 876-881. ISBN 978-1-5386-5455-2

Sargunam, T. G. and Prabhu, Chinnaraj Munirathina and Singh, Ajay Kumar (2019) Design of High Performance FinFET SRAM Cell for Write Operation. In: Emerging Trends in Computing and Expert Technology. Lecture Notes on Data Engineering and Communications Technologies, 35 . Springer, Cham, pp. 908-914. ISBN 978-3-030-32149-9, 978-3-030-32150-5

Sharuddin, Iffa and Lee, Lini (2015) Modified SR latch in dynamic comparator for ultra-low power SAR ADC. In: 2015 IEEE International Circuits and Systems Symposium (ICSyS). IEEE, pp. 151-154. ISBN 978-1-4799-1731-0


Lee, Meng Chuan (2015) Threshold voltage instability on nitride based localized charge trap non-volatile memory devices. PhD thesis, Multimedia University.

Loon, Kuan Teng (2019) Predicting The Elastic Behaviour Of Multilayer High Density Interconnect Printed Circuit Board From Its Constituent Materials. Masters thesis, Multimedia University.

Ong, Peng Shen (2014) Real-time implementation of visual based fall detection in Field Programmable Gate Array. Masters thesis, Multimedia University.

Sharuddin, Iffa (2016) Ultra-Low Power Analog-To-Digital Converter For Medical Application With Emphasis On Dynamic Comparator. Masters thesis, Multimedia University.

Subramaniam, Shahmini (2019) Design Of Power Efficient Pass Transistor Logic Based Full Adder Circut For Digital Finite Impluse Response Filter. Masters thesis, Multimedia University.

This list was generated on Sun Sep 26 20:50:40 2021 +08.