High Performance Data Aware (HPDA) SRAM cell for IoT applications


Singh, Ajay Kumar and Prabhu, Chinnaraj Munirathina and Sargunam, T. G. (2019) High Performance Data Aware (HPDA) SRAM cell for IoT applications. ARPN Journal of Engineering and Applied Sciences, 14 (1). pp. 91-94. ISSN 1819-6608

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Low power and high performance of static random access memory (SRAM) are the main key issues and has become vital components in modern VLSI systems.The system power, performance and reliability can be significantly improved by controlling the power dissipation in SRAM. In this paper, the new technique is introduced in the High Performance Data Aware (HPDA) SRAM design to reduce the power dissipation and access delay for read/write operation. The proposed new technique employed in the HPDA SRAM cell has proved to minimize the write power dissipation about 83% and read power consumption about 50%than the 6T cell. The read access time and stability of the HPDA cell are also improved in the new design SRAM cell.

Item Type: Article
Uncontrolled Keywords: SRAM cell, power, performance, standby mode, leakage current, SNM.
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK9001-9401 Nuclear engineering. Atomic power
Divisions: Faculty of Engineering and Technology (FET)
Depositing User: Ms Suzilawati Abu Samah
Date Deposited: 11 Feb 2022 03:08
Last Modified: 11 Feb 2022 03:08
URII: http://shdl.mmu.edu.my/id/eprint/9121


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