Low-power fast (LPF) SRAM cell for write/read operation

Prabhu, C. M. R. and Singh, Ajay Kumar (2011) Low-power fast (LPF) SRAM cell for write/read operation. IEICE Electronics Express, 8 (18). pp. 1473-1478. ISSN 1349-2543

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Official URL: http://dx.doi.org/10.1587/elex.8.1473

Abstract

Power consumption and Static noise margin (SNM) are most important parameters for memory design. The main source of power consumption in SRAM cell is due to large voltage swing on the bitlines during write operation. To reduce the power consumption and enhance the performance of the SRAM cell, we propose a Low-power fast (LPF) SRAM cell. The cell is simulated in terms of power, delay and read stability. The simulated result shows that the read and write power of the proposed cell is reduced up to 33% and 57.12% at 1.2V (in CMOS 0.12 mu m technology) respectively compared to the 6T cell. The read SNM of the LPF cell is 2x times of the conventional cell.

Item Type: Article
Subjects: T Technology > TA Engineering (General). Civil engineering (General)
Divisions: Faculty of Engineering and Technology (FET)
Depositing User: Ms Rosnani Abd Wahab
Date Deposited: 09 Jan 2012 04:00
Last Modified: 09 Jan 2012 04:00
URI: http://shdl.mmu.edu.my/id/eprint/3341

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