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Tan, Kok Siang and Sulaiman, Mohd Shahiman and Chuah, Hean Teik and Sachdev, Manoj (2007) Design of high-speed clock and data recovery circuits. Analog Integrated Circuits and Signal Processing, 52 (1-2). pp. 15-23. ISSN 0925-1030, 1573-1979

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Tan, Kok Siang and Sulaiman, Mohd Shahiman and Ibne, Mamun Reaz and Chuah, Hean Teik and Sachdev, Manoj (2007) A fully-integrated 5 Gbit/s CMOS clock and data recovery circuit. Analog Integrated Circuits and Signal Processing, 51 (2). 101-109 . ISSN 0925-1030, 1573-1979