Article

Senthilpari, C. and Emerson, J. and Ramana Murhty, G. and Velrajkumar, P. (2012) Low-Power, High-Throughput, Unsigned Multiplier Using a Modified CPL Adder Cell for Signal Processing Circuit. Australian Journal of Basic and Applied Sciences, 6 (13). pp. 123-130. ISSN 1991-8178

Senthilpari, C. (2009) Circuits Research; New findings in circuits research described from Multimedia University. Computer Weekly News. p. 151.

Diwakar, K. and Senthilpari, C. and Singh, Ajay Kumar (2008) Highly stable Delta-Sigma Modulator for industrial applications. IEICE Electronics Express, 5 (15). pp. 530-536. ISSN 1349-2543

Conference or Workshop Item

Senthilpari, C. and Singh, Ajay Kumar and Diwakar, K. (2007) Low power and high speed 8x8 bit multiplier using non-clocked Pass Transistor Logic. In: International Conference on Intelligent and Advanced Systems, 25-28 NOV 2007 , Kuala Lumpur, MALAYSIA.

Senthilpari, C. and Diwakar, K. and Prabhu, C.M.R. and Singh, Ajay Kumar (2006) Power Deduction in Digital Signal Processing Circuit using Inventive CPL Subtractor Circuit. In: Conference.