Items where Author is "Diwakar, K."

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Number of items: 10.

Article

Diwakar, K. and Senthilpari, Chinnaiyan and Rajasegharan, V. V. and Ebenezer, Immanuel (2021) Role of 'e' in engineering applications. Journal of Engineering Science and Technology., 16 (6). pp. 4612-4625. ISSN 1823-4690

Senthilpari, Chinnaiyan and Diwakar, K. and Munusamy, Kumar and Francisca, J. Sheela (2017) Layout parameter analysis in Shannon expansion theorem based on 32 bit adder circuit. Engineering Science and Technology, an International Journal, 20 (1). pp. 35-40. ISSN 2215-0986

Chinnaiyan, Senthilpari and Kumari Selvam, Rosalind Deena and Gajula Ramana, Murthy and Pitchandi, Velrajkumar and Diwakar, K. (2014) Low Power and 5.8 GHz Operating Frequency of Digital Frequency Divider Using Proposed Sequential Circuit. Australian Journal of Basic and Applied Sciences, 8 (1). pp. 273-281. ISSN 1991-8178

Diwakar, K. (2009) Electronics; Scientists at Multimedia University detail research in electronics. Electronics Newsweekly. p. 193.

Diwakar, K. (2009) Electronics; New electronics study findings recently were published by researchers at Multimedia University. Electronics Business Journal. ISSN 1944-1614

Diwakar, K. (2008) Electronics; New findings from Multimedia University in the area of electronics described. Electronics Business Journal. p. 223.

Diwakar, K. and Senthilpari, C. and Singh, Ajay Kumar (2008) Highly stable Delta-Sigma Modulator for industrial applications. IEICE Electronics Express, 5 (15). pp. 530-536. ISSN 1349-2543

Conference or Workshop Item

Senthilpari, Chinnaiyan and Diwakar, K. and Deivasigamani, Subbramania Pattar and Velrajkumar, P. and Ayavoo, Rajenthyran (2022) Power Efficiency Top-Down ALU for Error Correction and Detection Circuit. In: 2022 3rd International Conference on Communication, Computing and Industry 4.0 (C2I4), 15-16 Dec 2022, Bangalore, India.

Senthilpari, C. and Singh, Ajay Kumar and Diwakar, K. (2007) Low power and high speed 8x8 bit multiplier using non-clocked Pass Transistor Logic. In: International Conference on Intelligent and Advanced Systems, 25-28 NOV 2007 , Kuala Lumpur, MALAYSIA.

Senthilpari, C. and Diwakar, K. and Prabhu, C.M.R. and Singh, Ajay Kumar (2006) Power Deduction in Digital Signal Processing Circuit using Inventive CPL Subtractor Circuit. In: Conference.

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