VHDL Modeling Of ATM To IP Conversion Chip


Chew, Beng Wah (2002) VHDL Modeling Of ATM To IP Conversion Chip. Masters thesis, Multimedia University.

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This project involves with ATM (Asynchronous Transfer Mode) technology and a method for incorporating it into existing computer networks based on the IP (Internet Protocol) standard. The objective of this project to model a computer chip that is able to convert ATM cells into IP packets and extracts the data from these IP packets, and it must also be reversible to split the IP data packets into small ATM cells.

Item Type: Thesis (Masters)
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK5101-6720 Telecommunication. Including telegraphy, telephone, radio, radar, television
Divisions: Faculty of Engineering (FOE)
Depositing User: Ms Rosnani Abd Wahab
Date Deposited: 15 Jul 2010 06:43
Last Modified: 15 Jul 2010 06:43
URII: http://shdl.mmu.edu.my/id/eprint/964


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