Hardware Parallel Processing of 3×3-pixel Image Kernels*


Kho, Daniel C. K. and Ahmad Fauzi, Mohammad Faizal and Lim, Sin Liang (2020) Hardware Parallel Processing of 3×3-pixel Image Kernels*. In: IEEE Region 10 Conference (TENCON), 16-19 November 2020, Online, Osaka, Japan.

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Video processing usually requires one to read in an entire image into a framebuffer, usually taking the form of random access memory (RAM). For kernel-based image and video processing, square-sized kernels are then extracted from this framebuffer, typically in 3×3-pixel sizes, though other sizes are also common. To meet the demand for ever higher image resolutions, larger and larger framebuffer RAM memories are required.While it is not feasible for software to read and process parts of an image quickly and efficiently enough due to the high speed of incoming video, a hardware-based video processing solution poses no such limitations. RAM-based framebuffers can also be found on hardware-based video processing systems, however such designs are not leveraging the full power and potential of processing image kernels with digital hardware. This paper introduces hardware techniques to read and process kernels without the need to store the entire image frame. This reduces the memory requirements significantly without loss of quality to the processed images.

Item Type: Conference or Workshop Item (Paper)
Uncontrolled Keywords: kernel processing, image processing, video processing, framebuffer, parallel processing, VHDL
Subjects: T Technology > TA Engineering (General). Civil engineering (General) > TA1501-1820 Applied optics. Photonics
Divisions: Faculty of Engineering (FOE)
Depositing User: Ms Rosnani Abd Wahab
Date Deposited: 10 Sep 2021 10:44
Last Modified: 10 Sep 2021 10:44
URII: http://shdl.mmu.edu.my/id/eprint/8507


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