Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications

Bhuvaneswari, Thangavel (2012) Binary Decision Diagram (BDD) based new methodologies for performance analysis of Pass Transistor Logic (PTL) synthesis and other applications. PhD thesis, Multimedia University.

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Official URL: http://library.mmu.edu.my/diglib/onlinedb/dig_lib....

Abstract

This thesis extends the applicability of BDDs for Pass transistor Logic (PTL) synthesis since the Binary Decision Diagram (BDDs) are the state-of-the-art data structure for the representation and manipulation of Boolean functions in the area of Very Large Scale Integration (VLSI) CAD. A Reversed BDD technique is proposed first and then a Reversed BDD based Pass Transistor Logic (PTL) synthesis is presented for low power and high performance circuits without exploiting the canonical property of BDDs. The Reversed BDD technique performs better in terms of area, delay and power dissipation, due to the regularity reduced critical path, less interconnection wires, a multiplexer-based construction of PTL circuits and less switching activities.

Item Type: Thesis (PhD)
Additional Information: Call No.: TK7874.75 T43 2012
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
Divisions: Faculty of Engineering and Technology (FET)
Depositing User: Ms Nurul Iqtiani Ahmad
Date Deposited: 17 Jun 2014 03:48
Last Modified: 17 Jun 2014 03:48
URI: http://shdl.mmu.edu.my/id/eprint/5588

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