A Unified FPGA-Based System Architecture for 2-D Discrete Wavelet Transform

Citation

Sameen, Ishmael Visayana and Chang, Yoong Choon and Ng, Mow Song and Goi, Bok Min and Ooi, Chee Pun (2013) A Unified FPGA-Based System Architecture for 2-D Discrete Wavelet Transform. Journal of Signal Processing Systems, 71 (2). pp. 123-142. ISSN 1939-8018

[img] Text
A Unified FPGA-Based System Architecture for 2-D Discrete Wavelet Transform.pdf
Restricted to Repository staff only

Download (1MB)

Abstract

This paper presents a novel unified and programmable 2-D Discrete Wavelet Transform (DWT) system architecture, which was implemented using a Field Programmable Gate Array (FPGA)-based Nios II soft-core processor working in combination with custom hardware accelerators generated through high-level synthesis. The proposed system architecture, synthesized on an Altera DE3 Stratix III FPGA board, was developed through an iterative design space exploration methodology using Altera's C2H compiler. Experimental results show that the proposed system architecture is capable of real-time video processing performance for grayscale image resolutions of up to 1920 x 1080 (1080p) when ran on the Altera DE3 board, and it outperforms the existing 2-D DWT architecture implementations known in literature by a considerable margin in terms of throughput. While the proposed 2-D DWT system architecture satisfies real-time performance constraints, it can also perform both forward and inverse DWT, support a number of popular DWT filters used for image and video compression and provide architecture programmability in terms of number of levels of decomposition as well as image width and height. Based from the design principles used to implement the proposed 2-D DWT system architecture, a system design guideline can be formulated for SOC designs which plan to incorporate dedicated 2-D DWT hardware acceleration.

Item Type: Article
Uncontrolled Keywords: Field-programmable gate arrays (FPGAs), Discrete wavelet transform (DWT), Design space exploration, High-level synthesis
Subjects: Q Science > QA Mathematics > QA71-90 Instruments and machines > QA75.5-76.95 Electronic computers. Computer science
Divisions: Faculty of Engineering (FOE)
Depositing User: Ms Rosnani Abd Wahab
Date Deposited: 13 Jun 2013 03:32
Last Modified: 21 Feb 2017 08:37
URII: http://shdl.mmu.edu.my/id/eprint/3856

Downloads

Downloads per month over past year

View ItemEdit (login required)